This invention relates in general to particulate contamination in integrated circuit (IC) processing and relates more particularly to a plasma reactor design and process that greatly reduces the particulate contamination of wafers during etching of or deposit of thin films on a wafer within such a plasma reactor.
In the figures, the first digit of a reference numeral indicates the first figure in which is presented the element identified by that reference numeral.
Integrated circuit processing technology is continuously concerned with reducing the feature size of circuits to increase the amount of circuitry that can be packed onto an integrated circuit of a given size and to increase the speed of operation by reducing the distance that signals need to travel within such circuits. As feature size has decreased and as circuit complexity has increased, the effect of particulate contamination on process yields has become increasingly important. Particulates of diameter even several times smaller than the feature size of a component can cause failure of the IC if a particle was present at a critical location in the IC during a plasma process step.
Thus, the effect of particulates on yield is particularly critical for the submicron minimum feature size circuits available today because particulates as small as a fraction of a micron can make a circuit inoperable. The numbers of such particles has been found to increase rapidly with decreasing size. This problem is particularly acute for large area ICs such as microprocessors and .gtoreq.4 megabit memories because such ICs have an increased area over which a critical defect can occur.
The multilayer structure of typical ICs also increases the effect of particulates on yield. A particulate incorporated into one level of an IC can affect not only the circuitry on that level, but can also affect circuity on other levels. A defect in an embedded level of an IC can propagate through overlying layers, distorting the topography and thus disrupting operation of those circuit elements. For these reasons it is important to minimize the amount of particulates that come into contact with a wafer immediately before and during processing.
Particulate contamination is important in all phases and types of IC processing and is especially important in processes that utilize a plasma reactor. Plasma reactors can be used in a number of different phases of IC processing. These uses of plasma reactors include plasma etching, reactive ion etching and plasma enhanced chemical vapor deposition. Airborne particulates within a plasma reactor can settle onto a wafer, thereby potentially interfering with subsequently produced IC circuitry.
FIG. 1 illustrates the relative size of some common airborne particulates (see, for example, chapter 7 of the text by Peter Van Zant entitled Microchip Fabrication, published by Semiconductor Services, San Jose, Calif., 1985). Expensive, intricate clean rooms and clean room procedures are utilized to significantly reduce the amount of airborne particulates to which a wafer is exposed during IC fabrication.
Unfortunately, clean rooms cannot prevent airborne particulates from getting into or being produced within a plasma reactor chamber. Even the most careful procedures cannot eliminate all particulates from the reactor chamber before processing begins. Reactant gases, even after filtering, and the wafers themselves can carry additional particulates into the processing chamber. Finally, the plasmas are usually such as to create or cause growth of submicroscopic particles due to their need to selectively etch a given film while not etching others.
In U.S. Pat. No. 4,728,389, entitled Particulate-free Epitaxial Process, issued to Roger E. Logar on Mar. 1, 1988, an epitaxial process is presented that tries to minimize particulates within the processing chamber. Electrostatic attraction is substantially eliminated as a transport mechanism by the selective application of a low level of radiant or conductive thermal energy during cold portions of the epitaxial deposition process.
FIG. 3 illustrates a wafer handling system 30 that allows a robot 31 to supply wafers to any of a plurality of IC processing chambers. This system enables wafers 32 to be exchanged between a wafer cassette elevator 33 and any of the chambers 34-37 without breaking vacuum in these chambers. Robot 31 includes an extensible arm 38 that can extend a wafer blade 38 radially into any of chambers 33-37. Arm 38 is mounted on a rotatable table 310 that enables extensible arm to be directed at any selected one of chambers 33-37. This enables the chambers to be carefully cleaned and purged before wafers are introduced for processing. Even if all particulates could have been purged from chambers 32-35 before processing, the mechanical steps of moving wafers among the chambers and from the wafer cassette elevator 31 to the chambers and back will produce some airborne particulates and the reactants will introduce some particulates. Thus, it would be advantageous to be able to prevent some or all of the airborne particulates within the processing chambers from depositing on the wafers.